16bit Quad-Channel Analog-to-Digital Converter GX9653 Hardware and Software Compatible with AD9653 for High-Speed Imaging Applications

Analog-to-digital converters are key components in imaging circuits, and their performance directly affects image quality and imaging speed. In high-speed imaging circuits, analog-to-digital converters need to have high speed, high resolution and low power consumption and other characteristics. This paper focuses on a four-channel, 16-bit, 125MSPS GX9653 hardware and software compatible AD9653 used in high-speed imaging, high-speed, high-precision image acquisition and processing can provide reliable technical support.

With on-chip sample-and-hold circuitry, the GX9653 features low design cost, low power consumption, small size and ease of use. Optimized for conversion rates up to 125MSPS, the GX9653 delivers excellent dynamic performance and low power consumption in a small package. The ADC requires a single 1.8V supply and LVPECL/CMOS/LVDS compatible sample clock to achieve good performance. Additional reference and driver components are not required for most applications.

The GX9653‘s built-in PLL automatically boosts the frequency of the output sample clock for serial data based on the sample clock. The output data sample clock is used to receive the serial output bit and the frame clock output is used to signal the output data byte. Single-channel power-down is supported, and power consumption is typically less than 2 mW when all channels are disabled.The ADC includes several features to increase flexibility and reduce system cost, such as programmable output clocks, data alignment, and digital test modes. Available digital test modes include built-in deterministic and pseudo-random modes, as well as customized test modes input via the serial interface (SPI).

GX9653 for the 48-pin LFCSP package, rated operating temperature range of up to -40 ℃ ~ 125 ℃, the chip against the ADI‘s AD9653 series, can be realized in-situ replacement. The main features of the chip are described below:

- Data rate: 20Msps~125Msps

- Signal-to-noise ratio (SNR):

77.9dBFs@Vref=1V,fin=10MHz; 72.2dBFs@Vref=1V,fin=200MHz

- Spurious-free signal input range (SFDR)

96.66dBFs@Vref=1V,fin=10MHz; 78.8dBFs@Vref=1V,fin=10MHz

- 1.8V power consumption: single channel 170mW@125Msps

- Built-in reference and clock buffer

- Analog input bandwidth 650MHz

- 2Vpp input voltage range, support up to 2.6Vpp

- Power supply range: analog supply 1.7V to 1.9V; digital supply 1.7V to 1.9V

- Differential nonlinearity (DNL) = ±0.7LSB; integral nonlinearity INL = ±3.5LSB

- Flexible power-off and standby modes, independently controllable by each channel, flexible output code value modes, support for multi-chip synchronization, clock frequency division