Dual-channel 14-bit 105MSPS Analog-to-Digital Converter GX9258 Replaces AD9258 for LIDAR LIDAR

LIDAR obtains distance information about a target object by transmitting laser pulses and measuring the time of the reflected light, and the photodetector at the receiving end converts the reflected light signal into an analog electrical signal. LIDAR needs to accurately measure the time delay of the reflected light to realize high-precision distance measurement, and the resolution and sampling rate of the analog-to-digital converter have a direct impact on the measurement accuracy. A high resolution analog-to-digital converter can quantize the analog signal more finely and reduce the quantization error.

The high-resolution features of the dual-channel, 14-bit, 80MSPS/105MSPS analog-to-digital converter GX9258 can provide more accurate measurement results. Meanwhile, the high sampling rate of 105MSPS can sample the analog signal multiple times within a short period of time to accurately capture the details of the signal‘s variations, which helps to improve the accuracy and resolution of distance measurement. The chip is powered by a 1.8V power supply and has a built-in high-performance sample-and-hold circuit and an on-chip reference voltage source.

The product utilizes a multi-stage differential pipeline architecture with built-in output error correction logic, providing 14-bit precision at 105MSPS data rate and guaranteed lossless code over the entire operating temperature range. The analog-to-digital converters have a variety of built-in features that optimize device flexibility and minimize system cost, such as the generation of programmable digital test codes. Available digital test codes include built-in fixed and pseudo-random codes, as well as user-defined test codes input via the serial port interface (SPI).

A differential clock input is used to control all internal conversion cycles. The digital output data format is offset binary, Gray code, or binary complement. Each ADC channel has a data output clock (DCO) to ensure proper latch timing for the receive logic. The device supports 1.8V CMOS outputs and LVDS outputs, and output data can be multiplexed on a single output bus.