Transformer coupling design of dual-channel analog-to-digital converter GX9268 (compatible with AD9268)

In the design of high-speed IF signal pre-processing circuit system, according to the needs of the continuous pursuit of high-speed ADC of each circuit link optimization design to achieve higher targets, and ADC front-end coupling design is no exception. ADC front-end is to determine the analog-to-digital converter to receive and sample the signal quality of the key parts; to achieve the following major goals: bandwidth, VSWR voltage VSWR, pass-band flatness, SNR SNR, SFDR spurious-free dynamic range, and input drive level.

The GX9268 is a dual-channel 16-bit ADC with a multi-stage, differential pipeline architecture and a maximum conversion speed of 125 MSps. The internal clock buffer, reference voltage source, input sample hold and other functional modules are integrated to achieve high-speed and high-precision analog-to-digital conversion of analog inputs. The ADC integrates a unique digital calibration algorithm, which can effectively improve the dynamic characteristics of the ADC without affecting power consumption.

The GX9268 outputs a 1.8V fully parallel CMOS level, and uses a three-wire SPI serial interface to realize internal register read/write operations.The GX9268 is packaged in a 64-pin QFN package rated from -40°C to 85°C industrial temperature range; this makes it very suitable for high-performance, low-cost, small-size and multi-functional signal processing systems, and in addition, the GX9268 can be fully pin to pin AD9268. GX9268 can be completely pin to pin AD9268, but also has a certain price advantage!

GX9268 main performance:

- 1.8V analog power supply, 1.8V CMOS output power supply

- Low power consumption: 750mW (125MSps)

- Signal-to-Noise Ratio (SNR): 78dBFS (70MHz, 125MSps)

- Spurious Free Dynamic Range (SFDR): 88dBc (70MHz, 125MSps)

- IF sampling frequency up to 400MHz or more

- Small-signal input noise: -154.0dBm/H (200Ω input impedance, 70MHz, 125MSps)

- Programmable ADC internal reference voltage source, integrated ADC sample-and-hold inputs

- Flexible analog input range: 1Vpp to 2Vpp

- Differential analog input 650MHz bandwidth, ADC clock duty cycle stabilizer

- Serial port control, QFN-64 package 9mmx9mm